ADMS
ADMS is a public domain software to translate Verilog-A models into C-models which can be directly read by a number of SPICE simulators, including Spectre Circuit Simulator, Ngspice and HSpice.
Overview
ADMS stands for Automatic Device Model Synthesizer.[1] ADMS can read Verilog-A code, and generate compact models[2] in the form of C files. ADMS interpreter parses a Verilog-AMS file to build a data tree.[3] XML filters are applied on the tree to generate the output files.
ADMS substantially reduces the effort of circuit simulator developers to integrate device models - at the same time, it provides the option to compact model developers to use Verilog-A for model definition, making the model more robust and maintainable.[4]
ADMS is used by the open source SPICE simulator NGSPICE[5] to support a number of compact models. Following models are supported by NGSPICE using ADMS:[6]
- MOS EKV (LEVEL=44)
- MOS PSP102 (LEVEL=45)
- BJT Mextram 504 (LEVEL=6)
- BJT Hicum0 (LEVEL=7)
- BJT Hicum2 (LEVEL=8)
Limitations
ADMS can not process all Verilog-A syntaxes. Specifically, the following are not supported:
- V(..) <+ I(..)
Instead, this needs to be represented as a conductance expression (and not impedance).
i.e. I(..) <+ V(..)
- I (..) probes
- for loop
References
- ↑ http://www.mos-ak.org/boeblingen/slides/P3_Sukharev_MOS-AK_Boeblingen.pdf
- ↑ Transistor model#Models for circuit design .28compact models.29
- ↑ http://vacomp.noovela.com/tutorials.html
- ↑ http://www.ite.waw.pl/etij/pdf/35-03p.pdf
- ↑ http://ngspice.sourceforge.net/adms.html
- ↑ http://ngspice.sourceforge.net/admshowto.html
External links
- http://ekv.epfl.ch/files/content/sites/ekv/files/mos-ak/wroclaw/MOS-AK_LL.pdf
- http://sourceforge.net/projects/mot-adms/
- http://www.techconnectworld.com/Microtech2012/pdf/WCM2012-MChan.pdf
- http://i-mos.org/imos2/
- http://ngspice.sourceforge.net/admshowto.html