Atomic layer etching

Atomic layer etching is an emerging technique in semiconductor manufacture, in which a sequence alternating between self-limiting chemical modification steps which affect only the top atomic layers of the wafer, and etching steps which remove only the chemically-modified areas, allows the removal of individual atomic layers. The standard example is etching of silicon by alternating reaction with chlorine and etching with argon ions.

This is a better-controlled process than reactive ion etching, though the issue with commercial use of it has been throughput; sophisticated gas handling is required, and removal rates of one atomic layer per second are around the state of the art.^[1]

The equivalent process for depositing material is atomic layer deposition; this is substantially more mature, having been used by Intel for high-κ dielectric layers since 2007.

References

1. ↑ "Atomic Layer Etch now in Fab Evaluations". 2014-08-04.

External links

• Overview of atomic layer etching in the semiconductor industry