Foxton Technology
Foxton is an Intel code-name for a power-management technology that was originally planned for inclusion in the first dual-core Itanium 2 processor (code-named Montecito). By providing very granular control of voltages and clock frequencies within the processor, it enables software performance to be optimized for specific workloads, while ensuring that power consumption remains below a particular value. Due to unspecified issues, Foxton was not included in the initial release of Montecito. According to sources inside Intel, it is under consideration for future Itanium 2 processor versions.
How it Works
Foxton technology includes a highly advanced clock generation and distribution network. With this technology, the processor continuously measures total power draw, processor loads, voltage, and clock distribution quality across the entire device, and is able to produce extremely fine clock-to-voltage granularity under dynamic conditions. As a result, Foxton enables a processor to override factory adjusted settings, which are set at relatively high voltage levels at any given frequency to ensure stability against random voltage variances. By dynamically controlling voltage and frequencies across the entire device, Foxton is able to optimize performance for specific workloads, while ensuring that power consumption remains below specified thresholds.
Foxton improves power efficiency at any given clock rate, but that is not the primary reason it was developed. Itanium 2 processors implement a wide microarchitecture, which has enormous computing capacity (theoretically capable of sustaining a throughput of six instructions per cycle). However, many software applications can not utilize all the available execution resources, lacking adequate instruction level parallelism. Idle resources mean lower transistor switching activity, thus lower overall power consumption. Because Itanium 2 maintains such a wide and capable architecture, the decrease in power consumption for average code execution can be substantial. Since modern MPUs clock rates are constrained by power, not filling out the power envelope translates to lost performance. Foxton takes advantage of this decrease by increasing clock frequencies to accelerate performance, while keeping total power consumption below specified thresholds. The result is a processor architecture that can dynamically optimize performance versus power consumption across a broad range of workloads.
A Foxton-enabled chip has a variable voltage and frequency adjusted to a nominal power envelope that can be specified from software. Clock and voltage are adjusted to keep the chip's consumption within the envelope. Depending on the actual usage pattern the chip will be able to scale up or down, feeding the core with proper voltage. Under so called "low activity" workloads, which generate less heat while being executed, the processor speeds up until it reaches the nominal power setting. Inversely, "high activity" loads may cause the chip to reduce core voltage and clock rate to stay below the nominal power setting. Low-activity workloads typically include integer-intensive computations, such as commercial, database applications. Foxton technology should increase performance for these applications by about 10% compared with the same processor running with a "fixed clock." High activity workloads include floating point-intensive computations, such as scientific and R&D simulations. Nominal clock speeds for Itanium processors with Foxton should be based on power consumption for these intensive computations.
Intel said Foxton technology will not only appear in the Itanium family, but later in Xeons as well. However, no specific time-frame has been set so far.