Peter Hofstee

Peter Hofstee

Peter Hofstee (October 2014)

Peter Hofstee (October 2014)
Born Netherlands
Alma mater University of Groningen
Caltech
Thesis Synchronizing processes (1995)
Doctoral advisor Jan L. A. van de Snepscheut
K. Mani Chandy

Harm Peter Hofstee was born in the Netherlands and received his Doctorandus in theoretical physics from the University of Groningen, The Netherlands, in 1988. In 1994 he earned his PhD from California Institute of Technology (Caltech). Peter is currently a distinguished research staff member at the IBM Austin Research Laboratory, USA, and a part-time professor in Big Data Systems at Delft University of Technology, Netherlands.

Peter is best known for his contributions to Heterogeneous computing as the chief architect of the Synergistic Processor Elements in the Cell Broadband Engine processor used in the Sony Playstation3,[1][2] and the first supercomputer to reach sustained Petaflop operation. After returning to IBM research in 2011 he has focused on optimizing the system roadmap for big data, analytics, and cloud, including the use of accelerated compute. His early research work on coherently attached reconfigurable acceleration on POWER7 paved the way for the new coherent attach processor interface on POWER8.[3] Peter is an IBM Master Inventor with more than 100 issued patents [4] and a member of the IBM Academy of Technology.[5]

Background

Peter Hofstee was born in 1962 in Groningen. He obtained his master degree in theoretical physics of the Rijks Universiteit Groningen in 1988, after which he continued his studies at the California Institute of Technology (Caltech) in Pasadena. He completed his thesis in Caltech in 1991 with the title: Constructing Some Distributed Programs.[6] Continuing his PhD at Caltech, he obtained his Dr. title in 1995 with thesis titled: Synchronizing Processes.[7] Meanwhile, Peter was already enjoying teaching as a teaching assistant both in Groningen and at Caltech.

Career

Following his PhD, Peter joined Caltech as a lecturer for two years and moved to IBM in the Austin, Texas, Research Laboratory, where he had staff member, senior technical staff member and distinguished engineer positions.

Previous Positions


Lecturer (Member of the Faculty) at California Institute of Technology, Computer Science Department
Research Staff Member at IBM Austin Research Laboratory
Senior Technical Staff Member, Cell SPE Chief Architect at IBM Microelectronics Division / IBM Systems and Technology Group
Distinguished Engineer, Cell/B.E. Chief Scientist at IBM Systems and Technology Group

Current positions


Distinguished Research Staff Member, Workload-Optimized and Hybrid Systems at IBM Austin Research Laboratory
Professor, Big Data Systems at Delft University of Technology, the Netherlands

Since 2011, Peter is leading the Big Data system design work at IBM. In March 2016, Peter was appointed as professor to the chair of Big Data Computer Systems at the Faculty of Electrical Engineering, Mathematics and Computer Science at Delft University of Technology.

Awards

For Cell Broadband Engine, 2006
For Zebra/Ivy Grant Program Initiation, Jan. 2004 ( precursor to Roadrunner )
In appreciation for the world's first 1-GHz PowerPC Microprocessor, Feb. 1998
The Associated Students of the California Institute of Technology, 1995-96
1991-1993

Memberships/Honors

IBM Master Inventor

Member, IBM Academy of Technology

Member of the Institute of Electrical and Electronics Engineers and Association for Computing Machinery

References

  1. ↑ C|NET Article: PlayStation 3 chip goes easy on developers
  2. ↑ Scarpino, M. (2008). Programming the cell processor: for games, graphics, and computation. Pearson Education.
  3. ↑ IBM Research Blog: Making Power Open to the Enterprising Masses
  4. ↑ JUSTIA Patents, Patents by Inventor Harm Peter Hofstee
  5. ↑ IBM Academy of Technology members list
  6. ↑ Master Thesis PDF: Constructing Some Distributed Programs
  7. ↑ PhD Thesis PDF: Synchronizing Processes
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