Tilera
| Industry | Semiconductor industry |
|---|---|
| Founded | October 2004 |
| Founder | Anant Agarwal, Devesh Garg, and Vijay K. Aggarwal |
| Headquarters | San Jose, California, USA |
Key people | Devesh Garg, President & CEO |
| Products | Central processing units |
| Owner | Privately funded |
| Parent | EZchip Semiconductor |
| Website |
www |
Tilera Corporation is a fabless semiconductor company focusing on scalable manycore embedded processor design. The company ships multiple processors, including the TILE64, TILEPro64, and the TILEPro36, TILE-Gx72, TILE-Gx36, TILE-Gx16 and TILE-Gx9.
History
In 1990, Anant Agarwal led a team of researchers at Massachusetts Institute of Technology to develop scalable multi-processor system built out of large numbers of single chip processors. Alewife machines integrated both shared memory and user-level message passing for inter-node communications.[1]
In 1997, Agarwal proposed a follow-on project using a mesh technology to connect multiple cores. The follow-on project, named RAW, commenced in 1997, and was supported by DARPA/NSF's funding of tens of millions, resulting in the world's first 16-processor tiles multicore and proving the mesh and compiler technology.
Tilera was founded in October 2004, by Agarwal, Devesh Garg, and Vijay K. Aggarwal. Tilera launched its first product, the 64-core TILE64 processor, in August 2007. Tilera raised more than $100 million in venture funding from Bessemer Venture Partners, Walden International, Columbia Capital and VentureTech Alliance, with strategic investments from Broadcom, Quanta Computer and NTT. The company is headquartered in San Jose, California and operates a research and development facility in Westborough, Massachusetts, USA. It has Sales and Support Centers in Shenzhen China, Yokohama Japan and in Europe.
In July 2014, Tilera was acquired by EZchip Semiconductor, a company that develops high-performance multi-core network processors, for $130 million in cash.[2]
Products
Tilera's primary product family is the Tile CPU. Tile is a multicore design, with the cores communicating via a new mesh architecture, called iMesh, intended to scale to hundreds of cores on a single chip. The goal is to provide a high-performance CPU, with good power efficiency, and with greater flexibility than special-purpose processors such as DSPs. In October 2009, they announced a new chip family TILE-Gx based on 40nm technology that features up to 72 cores at 1.2 GHz. Other TILE-Gx family members include 9-, 16-, 36-core variants.
Their primary markets for this new chip which launched in October 2011, include:
- Cloud computing applications such as web indexing, search engine and cache acceleration servers
- Networking equipment including intelligent routers, firewalls, network test equipment, and forensic / data-mining applications
- Multimedia applications such as videoconferencing, broadcast video servers, and edge QAM systems
- Wireless infrastructure such as 4G Node B Base Station, RNC, and Media Gateways
The 36-core general purpose CPU consumes approximately 35 watts at full load.
In October 2010, version 2.6.36 of the mainline Linux kernel added support for the Tilera architecture.[3]
Tilera also provides software development tools — designated the Multicore Development Environment (MDE) — for Tile and a line of boards built around the Tile processors.
The networking software company 6WIND provides high-performance packet processing software for the TilePro64 platform.[4]
On 25 July 2011, TilePro processor was found by Facebook to be 3-times more energy-efficient than Intel's x86, based on Facebook's experiments on servers using TilePro processor and Intel's x86.[5]
In November 2012, MikroTik became the first manufacturer to ship devices based on the Tile-GX processors, the product line is called Cloud Core Router.[6]
The Angstrom Project
Agarwal is leading a new MIT effort dubbed The Angstrom Project. It is one of four DARPA-funded efforts aimed at building exascale supercomputers. The goal is to design a chip with 1,000 cores.[7][8]
Board of directors
- Anant Agarwal, co-founder and Chief Technology Officer
- Rob Chandra
- Phil Herget
- Devesh Garg
- Lip Bu-Tan
- Nariman Yousefi
See also
References
- ↑ "Tilera: About Us". Tilera: About Us. Tilera Corporation. 2009. Retrieved 26 October 2009.
- ↑ EZchip to Buy Tilera
- ↑ "1.1. Tilera architecture support", Linux 2.6.36 Release Notes
- ↑ http://www.6wind.com/wp-content/uploads/PDF/press/2011/6WIND-announces-availability-of-Tilera-TilePro64-support.pdf
- ↑ Takahashi, Dean (25 July 2011). "Facebook study shows Tilera processors are four times more energy efficient". Venturebeat. Retrieved 25 July 2011.
- ↑ http://cloudcorerouter.com Cloud Core Router product page
- ↑ "The Angstrom Project". MIT Computer Science and Artificial Intelligence Laboratory. Retrieved 23 January 2012.
- ↑ Smalley, Eric (23 January 2012). "MIT Genius Stuffs 100 Processors Into Single Chip". Wired Magazine. Retrieved 23 January 2012.
External links
- Official website
- "Tilera Open Source".
- "Tilera Documentation".
- Stokes, Jon (20 August 2007). "MIT startup raises multicore bar with new 64-core CPU". Ars Technica.
- "MIT Startup Unveils New 64-Core CPU". Slashdot. 20 August 2007.
- Brown, Eric (30 April 2008). "64-way chip gains Linux IDE, dev cards, design wins". Linux for Devices. Archived from the original on 27 January 2013.
- Mitra, Sramana (20 August 2007). "The next big innovation in microprocessors: Sramana Mitra". Interview of Anant Agarwal.