Icarus Verilog

Icarus Verilog
Developer(s) Stephen Williams
Stable release 10.0 / 23 August 2015 (2015-08-23)
Written in C++
Operating system Linux, FreeBSD, OpenSolaris, AIX, Microsoft Windows, and Mac OS X
Platform Cross-platform
Available in English
Type Verilog Simulator
License GNU General Public License
Website http://iverilog.icarus.com/
http://sourceforge.net/projects/iverilog/

Icarus Verilog is an implementation of the Verilog hardware description language. It supports the 1995, 2001 and 2005 versions of the standard, portions of SystemVerilog, and some extensions.

Icarus Verilog is available for Linux, FreeBSD, OpenSolaris, AIX, Microsoft Windows, and Mac OS X. Released under the GNU General Public License, Icarus Verilog is free software.

As of release 0.9, Icarus is composed of a Verilog compiler (including a Verilog preprocessor) with support for plug-in backends, and a virtual machine that simulates the design. Release v10.0, besides general improvements and bug fixes, adds preliminary support for VHDL.

History

Not even the author quite remembers when the project was first started, but CVS records go back to 1998. There have been releases 0.2 through the current stable release 10.0.

Icarus Verilog development is done largely by the sole regular author, Stephen Williams. Some non-trivial portions have been contributed as accepted patches.

External links

This article is issued from Wikipedia - version of the Sunday, November 22, 2015. The text is available under the Creative Commons Attribution/Share Alike but additional terms may apply for the media files.