AMD Accelerated Processing Unit

AMD Accelerated Processing Unit
Release date 2011
Codename Fusion
Desna
Ontario
Zacate
Llano
Hondo
Trinity
Weatherford
Richland
Kaveri
Kabini
Temash
Carrizo
IGP
Wrestler
WinterPark
BeaverCreek
Architecture AMD64
Models

Desktop E2 Series

Cores 2 to 4
Fabrication process and transistors

32 nm 1.178b (Llano)

  • 32 nm 1.303b (Trinity)
  • 32 nm 1.3b (Richland)
  • 28 nm 2.41b (Kaveri)
Rendering support
Direct3D Direct3D 12
OpenCL 1.2
OpenGL 4.1+

The AMD Accelerated Processing Unit (APU), formerly known as Fusion, is the marketing term for a series of 64-bit microprocessors from AMD designed to act as a CPU and graphics accelerator (GPU) on a single chip.

AMD announced the first generation APUs, Llano for high-performance and Brazos for low-power devices in January 2011. The second-generation Trinity for high-performance and Brazos-2 for low-power devices were announced in June 2012. The third-generation Kaveri for high performance devices was launched in January 2014, while Kabini and Temash for low-power devices were announced in summer 2013.

The Sony PlayStation 4 and Microsoft Xbox One eighth generation video game consoles both use semi-custom third-generation low-power APUs.

Although it doesn't use the name "APU", Intel Corporation produces CPU-GPU combinations like its Skylake that are architecturally very similar.[1]:63

History

The AMD Fusion project started in 2006 with the aim of developing a system on a chip that combined a CPU with a GPU on a single die. AMD took a key step toward realising such a vision when it acquired the graphics chipset manufacturer ATI[2] in 2006. The project reportedly required three internal iterations of the Fusion concept to create a product deemed worthy of release.[2] Reasons contributing to the delay of the project include the technical difficulties of combining a CPU and GPU on the same die at a 45 nm process, and conflicting views on what the role of the CPU and GPU should be within the project.[3]

The first generation desktop and laptop APU, codenamed Llano, was announced on January 4, 2011 at the 2011 CES show in Las Vegas and released shortly after.[4][5] It featured K10 CPU cores and a Radeon HD 6000-series GPU on the same die on the FM1 socket. An APU for low-power devices was announced as the Brazos platform, based on the Bobcat microarchitecture and a Radeon HD 6000-series GPU on the same die.

At a conference in January 2012, corporate fellow Phil Rogers announced that AMD would re-brand the Fusion platform as the Heterogeneous Systems Architecture (HSA), stating that "it's only fitting that the name of this evolving architecture and platform be representative of the entire, technical community that is leading the way in this very important area of technology and programming development."[6] However, it was later revealed that AMD had been the subject of a trademark infringement lawsuit by the Swiss company Arctic, who used the name "Fusion" for a line of power supplies.[7]

The second generation desktop and laptop APU, codenamed Trinity was announced at AMD's Financial Analyst Day 2010[8][9] and released in October 2012.[10] It featured Piledriver CPU cores and Radeon HD 7000 Series GPU cores on the FM2 socket.[11] AMD released a new APU based on the Piledriver microarchitecture on March 12, 2013 for Laptops/Mobile and on June 4, 2013 for desktops under the codename Richland.[12] The second generation APU for low-power devices, Brazos 2.0, used exactly the same APU chip, but ran at higher clock speed and rebranded the GPU as Radeon HD7000 series and used a new IO controller chip.

Semi-custom chips were introduced in the Microsoft Xbox One and Sony PlayStation 4 video games consoles.[13][14]

A third generation of the technology was released on 14 January 2014, featuring greater integration between the CPU and GPU. The desktop and laptop variant is codenamed Kaveri, based on Steamroller architecture, while the low-power variants, codenamed Kabini and Temash, are based on Jaguar architecture.[15]

Features

AMD Heterogeneous System Architecture

AMD is a founding member of the HSA Foundation and is consequently actively working on developing the Heterogeneous System Architecture in co-operation with the other members. The following hardware and software implementations are available in AMD's APU-branded products:

Type HSA feature First implemented Notes
Optimized Platform GPU Compute C++ Support 2012
Trinity APUs
Support OpenCL C++ directions and Microsoft’s C++ AMP language extension. This eases programming of both CPU and GPU working together to process support parallel workloads.
HSA-aware MMU GPU can access the entire system memory through the translation services and page fault management of the HSA MMU.
Shared Power Management CPU and GPU now share the power budget. Priority goes to the processor most suited to the current tasks.
Architectural Integration Heterogeneous Memory Management: the CPU's MMU and the GPU's IOMMU share the same address space.[16][17] 2014
PlayStation 4,
Kaveri APUs
CPU and GPU now access the memory with the same address space. Pointers can now be freely passed between CPU and GPU, hence enabling zero-copy.
Fully coherent memory between CPU & GPU GPU can now access and cache data from coherent memory regions in the system memory, and also reference the data from CPU's cache. Cache coherency is maintained.
GPU uses pageable system memory via CPU pointers GPU can take advantage of the shared virtual memory between CPU and GPU, and pageable system memory can now be referenced directly by the GPU, instead of being copied or pinned before accessing.
System Integration GPU compute context switch 2015
Carrizo APU
Compute tasks on GPU can be context switched, allowing a multi-tasking environment and also faster interpretation between applications, compute and graphics.
GPU graphics pre-emption Long-running graphics tasks can be pre-empted so processes have low latency access to the GPU.
quality of service[16] In addition to context switch and pre-emption, hardware resources can be either equalized or prioritized among multiple users and applications.

Feature overview

Features of AMD Accelerated Processing Units
Brand Llano Trinity Richland Kaveri Carrizo Bristol Ridge Raven Ridge    Desna,
Ontario,
Zacate
Kabini,
Temash
Beema,
Mullins
Carrizo-L
Platform Desktop, Mobile Desktop, Mobile Mobile, Desktop Desktop, Mobile Ultra-mobile
Released Aug 2011 Oct 2012 Jun 2013 Jan 2014 Jun 2015 Jun 2016 Mar 2017 Jan 2011 May 2013 Q2 2014 May 2015
Fab. (nm) GlobalFoundries 32 SOI 28 14 TSMC 40 28
Die size (mm2) 228 246 245 244.62 TBA TBA 75 (+ 28 FCH) ~107 TBA
Socket FM1, FS1 FM2, FS1+, FP2 FM2+, FP3 FP4, FM2+ AM4, FP4 AM4 FT1 AM1, FT3 FT3b FP4
CPU architecture AMD 10h Piledriver Steamroller Excavator Zen Bobcat Jaguar Puma Puma+[18]
Memory support DDR3-1866
DDR3-1600
DDR3-1333
DDR3-2133
DDR3-1866
DDR3-1600
DDR3-1333
DDR4-2400
DDR4-2133
DDR4-1866
DDR4-1600
DDR3L-1333
DDR3L-1066
DDR3L-1866
DDR3L-1600
DDR3L-1333
DDR3L-1066
DDR3L-1866
DDR3L-1600
DDR3L-1333
3D engine[lower-alpha 1] TeraScale 2
(VLIW5)
TeraScale 3
(VLIW4)
GCN 1.1
(Mantle, HSA)
GCN 1.2
(Mantle, HSA)
GCN 1.3
(Mantle, HSA)
TeraScale 2
(VLIW5)
GCN 1.1
Up to 400:20:8 Up to 384:24:6 Up to 512:32:8 Up to 768:48:12 80:8:4 128:8:4
IOMMUv1 IOMMUv2 IOMMUv1[19] TBA
Unified Video Decoder UVD 3 UVD 4.2 UVD 6 TBA UVD 3 UVD 4 UVD 4.2 UVD 6
Video Coding Engine N/A VCE 1.0 VCE 2.0 VCE 3.1 TBA N/A VCE 2.0 VCE 3.1
GPU power saving PowerPlay PowerTune N/A Enduro
Max. displays[lower-alpha 2] 2–3 2–4 2–4 3 4 TBA 2 TBA
TrueAudio N/A [21] N/A[19]
FreeSync N/A N/A
/drm/radeon[22][23][24] N/A
/drm/amd/amdgpu[25] N/A Experimental N/A Experimental
  1. Unified shaders : texture mapping units : render output units
  2. To feed more than two displays, the additional panels must have native DisplayPort support.[20] Alternatively active DisplayPort-to-DVI/HDMI/VGA adapters can be employed.

APU-branded platforms

AMD APUs have a unique architecture: they have AMD CPU modules, cache, and a discrete-class graphics processor all on the same die, using the same bus. This architecture allows for the use of graphics accelerators, such as OpenCL, with the integrated graphics processor.[26] The goal is to create a "fully integrated" APU, which, according to AMD will eventually feature 'heterogeneous cores' capable of processing both CPU and GPU work automatically, depending on the workload requirement.[27]

K10 architecture (2011): Llano

Main article: AMD 10h

The first generation APU, released in June 2011, was used in both desktops and laptops. It was based on the K10 architecture and built on a 32 nm process featuring two to four CPU cores on a TDP of 65-100 W, and integrated graphics based on the Radeon HD6000 Series with support for DirectX 11, OpenGL 4.2 and OpenCL 1.2. In performance comparisons against the similarly priced Intel Core i3-2105, the Llano APU was criticised for its poor CPU performance[30] and praised for its better GPU performance.[31][32] AMD was later criticised for abandoning Socket FM1 after one generation.[33]

Bobcat architecture (2011): Ontario, Zacate, Desna, Hondo

The AMD Brazos platform was introduced on January 4, 2011 targeting the subnotebook, netbook and low power small form factor markets.[4] It features the 9-watt AMD C-Series APU (codename: Ontario) for netbooks and low power devices as well as the 18-watt AMD E-Series APU (codename: Zacate) for mainstream and value notebooks, all-in-ones and small form factor desktops. Both APUs feature one or two Bobcat x86 cores and a Radeon Evergreen Series GPU with full DirectX11, DirectCompute and OpenCL support including UVD3 video acceleration for HD video including 1080p.[4]

AMD expanded the Brazos platform on June 5, 2011 with the announcement of the 5.9-watt AMD Z-Series APU (codename: Desna) designed for the Tablet market.[34] The Desna APU is based on the 9-watt Ontario APU, energy savings were achieved by lowering the CPU, GPU and north bridge voltages, reducing the idle clocks of the CPU and GPU as well as introducing a hardware thermal control mode.[34] A bidirectional turbo core mode was also introduced.

AMD announced the Brazos-T platform on October 9, 2012. It comprises the 4.5-watt AMD Z-Series APU (codename: Hondo) and the A55T Fusion Controller Hub (FCH), designed for the tablet computer market.[35][36] The Hondo APU is a redesign of the Desna APU. AMD lowered energy use by optimizing the APU and FCH for tablet computers.[37][38]

The Deccan platform including Krishna and Wichita APUs were cancelled in 2011. AMD originally planned to release them in the second half 2012.[39]

Piledriver architecture (2012): Trinity and Richland

Trinity The first iteration of the second generation platform, released in October 2012, brought improvements to CPU and GPU performance to both desktops and laptops. The platform features 2 to 4 Piledriver CPU cores built on a 32 nm process with a TDP between 65 W and 100 W, and a GPU based on the Radeon HD7000 Series with support for DirectX 11, OpenGL 4.2, and OpenCL 1.2. The Trinity APU was praised for the improvements to CPU performance compared to the Llano APU.[42]

Richland

The release of this second iteration of this generation was 12 March 2013 for mobile parts and 5 June 2013 for desktop parts.

Jaguar architecture (2013): Kabini and Temash

In January 2013 the Jaguar-based Kabini and Temash APUs were unveiled as the successors of the Bobcat-based Ontario, Zacate and Hondo APUs.[46][47][48] The Kabini APU is aimed at the low-power, subnotebook, netbook, ultra-thin and small form factor markets, the Temash APU is aimed at the tablet, ultra-low power and small form factor markets.[48] The two to four Jaguar cores of the Kabini and Temash APUs feature numerous architectural improvements regarding power requirement and performance, such as support for newer x86-instructions, a higher IPC count, a CC6 power state mode and clock gating.[49][50][51] Kabini and Temash are AMD's first, and also the first ever quad-core x86 based SoCs.[52] The integrated Fusion Controller Hubs (FCH) for Kabini and Temash are codenamed "Yangtze" and "Salton" respectively.[53] The Yangtze FCH features support for two USB 3.0 ports, two SATA 6 Gbit/s ports, as well as the xHCI 1.0 and SD/SDIO 3.0 protocols for SD-card support.[53] Both chips feature DirectX 11.1-compliant GCN-based graphics as well as numerous Heterogeneous System Architecture (HSA) improvements.[46][47] They were fabricated at a 28 nm process in an FT3 BGA package by TSMC, and were released on May 23, 2013.[49][54][55]

The PlayStation 4 and Xbox One were revealed to both be powered by 8-core semi-custom Jaguar-derived APUs.

ARM server architecture (2014): Seattle

A Cortex-A57-based 64-bit server solution SoC will be launched in the second half of 2014 and codenamed "Seattle".[56] The first AMD ARM chip has no GPU and is then not an APU, but later will be. Seattle will feature 8 or 16 core variants, with an expected clockspeed over 2 GHz, and will reportedly deliver up to four times the performance of current Opteron X processors.[57] These ARM processors will incorporate SeaMicro freedom fabric on die, offering up to 10 Gbit/s bandwidth, for server usage; additionally, each ARM processor will support up to 64 GB DRAM.[58]

Steamroller architecture (2014): Kaveri

The third generation of the platform, codenamed Kaveri, was partly released on January 14, 2014.[62] Kaveri contains up to four Steamroller CPU cores clocked to 3.9 GHz with a turbo mode of 4.1 GHz, up to a 512-core Graphics Core Next GPU, two decode units per module instead of one (which allows each core to decode four instructions per cycle instead of two), AMD TrueAudio,[63] Mantle API,[64] an on-chip ARM Cortex-A5 MPCore,[65] and will release with a new socket, FM2+.[66] Ian Cutress and Rahul Garg of Anandtech asserted that Kaveri represented the unified system-on-a-chip realisation of AMD's acquisition of ATI. The performance of the 45W A8-7600 Kaveri APU was found to be similar to that of the 100W Richland part, leading to the claim that AMD made significant improvements in on-die graphics performance per watt;[59] however, CPU performance was found to lag behind similarly-specified Intel processors, a lag that was unlikely to be resolved in the Bulldozer family APUs.[59] The A8-7600 component was delayed from a Q1 launch to an H1 launch because the Steamroller architecture components are alleged to not scale well at higher clock speeds.[67]

AMD announced the release of the Kaveri APU for the mobile market on June 4, 2014 at Computex 2014,[60] shortly after the accidental announcement on the AMD website on May 26, 2014.[68] The announcement included components targeted at the standard voltage, low-voltage, and ultra-low voltage segments of the market. In early-access performance testing of a Kaveri prototype laptop, AnandTech found that the 35W FX-7600P was competitive with the similarly-priced 17W Intel i7-4500U in synthetic CPU-focused benchmarks, and was significantly better than previous integrated GPU systems on GPU-focused benchmarks.[69] Tom's Hardware reported the performance of the Kaveri FX-7600P against the 35W Intel i7-4702MQ, finding that the i7-4702MQ was significantly better than the FX-7600P in synthetic CPU-focused benchmarks, whereas the FX-7600P was significantly better than the i7-4702MQ's Intel HD 4600 iGPU in the four games that could be tested in the time available to the team.[60]

Puma architecture (2014): Beema and Mullins

Puma+ architecture (2015): Carrizo-L (laptop and mobile processors)

Main articles: Puma+ (microarchitecture) and Graphics Core Next

Excavator architecture (2015): Carrizo (laptop and mobile processors)

Steamroller architecture (Q2–Q3 2015): Godavari (desktop Kaveri refresh)

Excavator architecture (2016): Bristol Ridge

See also

References

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